डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
MACH5 | Fifth Generation MACH Architecture MACH 5 CPLD Family
Fifth Generation MACH Architecture
FEATURES
x High logic densities and I/Os for increased logic integration
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— 128 to 512 macrocell densities — 68 to 256 I/Os Wide se |
Lattice |
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MACH220-15 | High-Density EE CMOS Programmable Logic | Lattice |
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MACH211 | High-Performance EE CMOS Programmable Logic | Lattice Semiconductor |
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MACH130-15 | High-Density EE CMOS Programmable Logic | Lattice |
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MACH231-10 | High-Performance EE CMOS Programmable Logic | Vantis |
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MACH230-10 | High-Density EE CMOS Programmable Logic | Lattice |
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MACH4-96 | High-Performance EE CMOS Programmable Logic | Lattice |
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MACH111 | High-Performance EE CMOS Programmable Logic | Lattice Semiconductor |
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MACH211SP-15 | High-Density EE CMOS Programmable Logic | Advanced Micro Devices |
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MACHXO2 | FPGA | Lattice |
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MACHLV210-20 | High Density EE CMOS Programmable Logic | Lattice |
www.DataSheet.in | 2017 | संपर्क |