M5M5V5636UG-16 डाटा शीट PDF( Datasheet )
डेटा पत्रक ( Datasheet PDF ) |
| भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
| M5M5V5636UG-16 | 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM DESCRIPTION
The M5M5V5636UG is a family of 18M bit synchronous SRAMs organized as 524288-words by 36-bit. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or wri |
 Renesas |
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| M5M5V5636UG-16 | 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM | Renesas |
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