डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
HD74LS11 | Triple 3-input Positive AND Gates Unit: mm
19.20 20.32 Max 14 8 6.30 7.40 Max 1
2.39 Max
1.30
7 7.62
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.10
Hitachi Code JEDEC EIAJ Weight (reference value |
Hitachi Semiconductor |
|
HD74LS11 | Triple 3-input Positive AND Gates HD74LS11 / HD74LS15
Triple 3-input Positive AND Gates / Triple 3-input Positive AND Gates (with Open Collector Outputs)
REJ03D0397–0300 Rev.3.00
Jul.13.2005
Features
• Ordering Information
• HD74LS11
Pa |
Renesas |
|
HD74LS112 | Dual J-K Negative-edge-triggered Flip-Flops 19.20 20.00 Max 16 9 7.40 Max 6.30
Unit: mm
1 1.3
1.11 Max
8
0.51 Min
2.54 Min 5.06 Max
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
Hitachi Code JEDEC EIAJ Weight (reference value)
+ 0.1 |
Hitachi Semiconductor |
|
HD74LS112 | Dual J-K Negative-edge-triggered Flip-Flops HD74LS112
Dual J-K Negative-edge-triggered Flip-Flops (with Preset and Clear)
REJ03D0426–0300 Rev.3.00
Jul.13.2005
Features
• Ordering Information
Part Name
Package Type
Package Code (Previous Code)
Pa |
Renesas |
|
HD74LS112P | Dual J-K Negative-edge-triggered Flip-Flops HD74LS112
Dual J-K Negative-edge-triggered Flip-Flops (with Preset and Clear)
REJ03D0426–0300 Rev.3.00
Jul.13.2005
Features
• Ordering Information
Part Name
Package Type
Package Code (Previous Code)
Pa |
Renesas |
|
HD74LS113 | Dual J-K Negative-edge-triggered Flip-Flops Unit: mm
19.20 20.32 Max 14 8 6.30 7.40 Max 1
2.39 Max
1.30
7 7.62
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.10
Hitachi Code JEDEC EIAJ Weight (reference value |
Hitachi Semiconductor |
|
HD74LS114 | Dual J-K Negative-edge-triggered Flip-Flops Unit: mm
19.20 20.32 Max 14 8 6.30 7.40 Max 1
2.39 Max
1.30
7 7.62
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.10
Hitachi Code JEDEC EIAJ Weight (reference value |
Hitachi Semiconductor |
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