HD74HC10 डाटा शीट PDF( Datasheet )

HD74HC10 Triple 3-input NAND Gates Features • • • • • High Speed Operation: tpd = 10.5 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Inp

HD74HC10 Triple 3-input NAND Gates Features • High Speed Operation: tpd = 10.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input

HD74HC107 Dual J-K Flip-Flops (with Clear) Description This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each one has independent J, K, c

HD74HC107 Dual J-K Flip-Flops (with Clear) REJ03D0559-0200 (Previous ADE-205-432) Rev.2.00 Oct 06, 2005 Description This flip-flop is edge sensitive to the clock input and change state on the negative going tr

HD74HC108 Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock) Description This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse. Each f

HD74HC108 Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock) REJ03D0560-0200 (Previous ADE-205-433) Rev.2.00 Oct 11, 2005 Description This flip-flop is edge sensitive to the clock input and chang

HD74HC109 Dual J-K Flip-Flops (with Preset and Clear) Description Each flip-flop has independent J, K , preset, clear and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and