डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
DM74LS10 | Triple 3-Input NAND Gate DM74LS10 Triple 3-Input NAND Gate
August 1986 Revised March 2000
DM74LS10 Triple 3-Input NAND Gate
General Description
This device contains three independent gates each of which performs the logic NAND functi |
Fairchild Semiconductor |
|
DM74LS10 | Triple 3-Input NAND Gates 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates
June 1989
54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates
General Description
This device contains three independent gates each of which performs the logi |
National Semiconductor |
|
DM74LS107A | Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops DM54LS107A DM74LS107A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
June 1989
DM54LS107A DM74LS107A Dual Negative-EdgeTriggered Master-Slave J-K Flip-Flops with |
National Semiconductor |
|
DM74LS109A | Dual Positive-Edge-Triggered J-K Flip-Flop DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs
June 1986 Revised March 2000
DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and C |
Fairchild Semiconductor |
|
DM74LS109A | Dual Positive-Edge-Triggered J-K Flip-Flops 54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs
June 1989
54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with P |
National Semiconductor |
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