डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
74LS75 | Quad Latch DM74LS75 Quad Latch
August 1986 Revised March 2000
DM74LS75 Quad Latch
General Description
These latches are ideally suited for use as temporary storage for binary information between processing units and inp |
Fairchild Semiconductor |
|
74LS75 | Quadruple Bistable Latches 19.20 20.00 Max 16 9 7.40 Max 6.30
Unit: mm
1 1.3
1.11 Max
8
0.51 Min
2.54 Min 5.06 Max
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
Hitachi Code JEDEC EIAJ Weight (reference value)
+ 0.1 |
Hitachi Semiconductor |
|
74LS75 | 4-BIT D LATCH 4-BIT D LATCH
The TTL/MSI SN54/ 74LS75 and SN54/ 74LS77 are latches used as temporary storage for binary information between processing units and input /output or indicator units. Information present at a data |
Motorola |
www.DataSheet.in | 2017 | संपर्क |