डेटा पत्रक ( Datasheet PDF ) |
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74AUP1G332 | Low Power 3-Input OR Gate www.DataSheet4U.com
74AUP1G332
Low-power 3-input OR gate
Rev. 01 — 13 November 2006 Product data sheet
1. General description
The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS devic |
NXP |
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74AUP1G332 | Low-power 3-input OR-gate 74AUP1G332
Low-power 3-input OR-gate
Rev. 7 — 20 January 2022
Product data sheet
1. General description
The 74AUP1G332 is a single 3-input OR gate. Schmitt-trigger action at all inputs makes the circuit tol |
nexperia |
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