74AUP1G08 डाटा शीट PDF( Datasheet )

www.DataSheet4U.com 74AUP1G08 Low-power 2-input AND gate Rev. 02 — 29 June 2006 Product data sheet 1. General description The 74AUP1G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device, su

74AUP1G08 SINGLE 2 INPUT POSITIVE AND GATE Description The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G08 is a sin

74AUP1G08 Low-power 2-input AND gate Rev. 10 — 13 January 2022 Product data sheet 1. General description The 74AUP1G08 is a single 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit to

74AUP1G08-Q100 Low-power 2-input AND gate Rev. 4 — 13 January 2022 Product data sheet 1. General description The 74AUP1G08-Q100 is a single 2-input AND gate. Schmitt-trigger action at all inputs makes the c

www.DataSheet4U.com 74AUP1G0832 Low-power 3-input AND-OR gate Rev. 01 — 8 November 2006 Product data sheet 1. General description The 74AUP1G0832 is a high-performance, low-power, low-voltage, Si-gate CMOS

74AUP1G0832 Low-power 3-input AND-OR gate Rev. 6 — 14 January 2022 Product data sheet 1. General description The 74AUP1G0832 is a single 3-input AND-OR gate. Schmitt-trigger action at all inputs makes the c