74AUP1G00 डाटा शीट PDF( Datasheet )

www.DataSheet4U.com 74AUP1G00 Low-power 2-input NAND gate Rev. 02 — 29 June 2006 Product data sheet 1. General description The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, s

74AUP1G00 SINGLE 2 INPUT POSITIVE NAND GATE Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. Pin Assignments The

74AUP1G00 Low-power 2-input NAND gate Rev. 8 — 13 January 2022 Product data sheet 1. General description The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit t

74AUP1G00-Q100 Low-power 2-input NAND gate Rev. 2 — 13 January 2022 Product data sheet 1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the