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A8514 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - High Efficiency Fault Tolerant LED Driver - Allegro

भाग संख्या A8514
समारोह High Efficiency Fault Tolerant LED Driver
मैन्युफैक्चरर्स Allegro 
लोगो Allegro लोगो 
पूर्व दर्शन
1 Page
		
<?=A8514?> डेटा पत्रक पीडीएफ

A8514 pdf
A8514
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Description (continued)
The A8514 is provided in a 20-pin TSSOP package (suffix LP) with
an exposed pad for enhanced thermal dissipation. It is lead (Pb) free,
with 100% matte tin lead frame plating.
Selection Guide
Part Number
Packing*
A8514KLPTR-T
4000 pieces per 13-in. reel
*Contact Allegrofor additional packing options
Absolute Maximum Ratings*
Characteristic
Symbol
Notes
Rating
Unit
LEDx Pins
–0.3 to 55
V
OVP Pin
–0.3 to 60
V
VIN, VSENSE, GATE Pins
VSENSE and GATE pins should not exceed VIN
by more than 0.4 V
–0.3 to 40
V
SW Pin
Continuous
t < 50 ns
–0.6 to 62
–1.0
V
V
¯F¯¯A¯¯U¯¯L¯¯T¯ Pin
-0.3 to 40
V
ISET, FSET, APWM, COMP Pins
–0.3 to 5.5
V
All Other Pins
–0.3 to 7
V
Operating Ambient Temperature
TA Range K
–40 to 125
ºC
Maximum Junction Temperature
TJ(max)
150 ºC
Storage Temperature
Tstg
–55 to 150
ºC
*Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical
Characteristics table is not implied. Exposure to Absolute Maximum-rated conditions for extended periods may affect device reliability.
Specifications
Thermal Characteristics
Pin-out Diagram and Terminal List
Characteristic Performance
Functional Description
Enabling the IC
Powering up: LED pin short-to-ground check
Soft start function
Frequency selection
Sync
LED current setting and LED dimming
PWM dimming
APWM pin
Analog dimming
LED short detect
Overvoltage protection
Boost switch overcurrent protection
Table of Contents
2 Input overcurrent protection and disconnect switch
3 Setting the current sense resistor
3 Input UVLO
8 VDD
11
11
Shutdown
Fault protection during operation
11 Application Information
13 Design Example for Boost Configuration
13 Design Example for SEPIC Configuration
14 Package Outline Drawing
15
15
16
18
18
Appendix A. Feedback Loop Calculations
Power Stage Transfer Function
Output to Control Transfer Function
Stabilizing the Closed Loop System
19 Measuring the Feedback Loop Gain and Phase Margin
21
22
23
23
23
23
24
26
26
30
34
A-1
A-1
A-2
A-4
A-6
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2

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