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IDT8N0Q001 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Quad-Frequency Programmable XO - IDT

भाग संख्या IDT8N0Q001
समारोह Quad-Frequency Programmable XO
मैन्युफैक्चरर्स IDT 
लोगो IDT लोगो 
पूर्व दर्शन
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IDT8N0Q001 pdf
IDT8N0Q001REV H Data Sheet
QUAD-FREQUENCY PROGRAMMABLE-XO
Pin Descriptions and Characteristics
Table 1. Pin Descriptions
Number
Name
1, 7 DNU
2 OE
3 GND
4, 5
FSEL0,
FSEL1
6Q
8 VDD
9 SDATA
10 SCLK
Type
Input
Power
Input
Output
Power
Input
Input
Pullup
Pulldown
Pullup
Pullup
Description
Do not use. Do not connect
Output enable pin. See Table 3B for function. LVCMOS/LVTTL
interface levels.
Power supply ground
Default frequency select pins. LVCMOS/LVTTL interface levels. Refer to
the FemtoClock NG Ceramic-Package XO and VCXO Ordering Product
Information document for default frequency order codes.
Clock output. LVCMOS interface levels.
Positive supply pin.
I2C Data Input. LVCMOS/LVTTL interface levels.
I2C Clock Input. LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
CIN Input Capacitance
CPD
Power Dissipation
Capacitance
RPULLUP
RPULLDOWN
Input Pullup Resistor
Input Pulldown Resistor
ROUT
Output Impedance Q
Test Conditions
OE, SDATA, SCLK, FSEL[0:1]
VDD = 3.465V or 2.625V
Minimum
VDD = 3.3V
VDD = 2.5V
Typical
4
8
50
50
15
19
Maximum
Units
pF
pF
k
k
Function Tables
Table 3A. Default Frequency Selection
Input
FSEL1
FSEL0
Operation
0 (default) 0 (default)
Default frequency 0
01
Default frequency 1
10
Default frequency 2
11
Default frequency 3
NOTE: The default frequency is the output frequency after power-up.
One of four default frequencies is selected by FSEL[1:0]. See
programming section for details.
Table 3B. OE Configuration
Input
OE Output Enable
0 Output Q are in high-impedance state.
1 (default) Output is enabled.
NOTE: OE is an asynchronous control.
IDT8N0Q001HCD REVISION A APRIL 4, 2014
2
©2014 Integrated Device Technology, Inc.

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