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ICS951462 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Programmable System Clock Chip - ICS

भाग संख्या ICS951462
समारोह Programmable System Clock Chip
मैन्युफैक्चरर्स ICS 
लोगो ICS लोगो 
पूर्व दर्शन
1 Page
		
<?=ICS951462?> डेटा पत्रक पीडीएफ

ICS951462 pdf
Integrated
Circuit
Systems, Inc.
Pin Description
PIN #
1 GNDREF
2 VDDREF
3 X1
4 X2
5 VDD48
6 48MHz_0
7 48MHz_1
8 GND48
9 SMBCLK
10 SMBDAT
PIN NAME
11 RESET_IN#
12 SRCCLKT7
13 SRCCLKC7
14 VDDSRC
15 GNDSRC
16 SRCCLKT6
17 SRCCLKC6
18 SRCCLKT5
19 SRCCLKC5
20 SRCCLKT4
21 SRCCLKC4
22 GNDSRC
23 VDDSRC
24 SRCCLKT3
25 SRCCLKC3
26 SRCCLKT2
27 SRCCLKC2
28 VDDSRC
29 GNDSRC
30 ATIGCLKT3
31 ATIGCLKC3
32 *CLKREQB#
ICS951462
TYPE
PWR
PWR
IN
OUT
PWR
OUT
OUT
PWR
IN
I/O
IN
OUT
OUT
PWR
PWR
OUT
OUT
OUT
OUT
OUT
OUT
PWR
PWR
OUT
OUT
OUT
OUT
PWR
PWR
OUT
OUT
IN
DESCRIPTION
Ground pin for the REF outputs.
Ref, XTAL power supply, nominal 3.3V
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Power pin for the 48MHz output.3.3V
48MHz clock output.
48MHz clock output.
Ground pin for the 48MHz outputs
Clock pin of SMBUS circuitry, 5V tolerant
Data pin of SMBUS circuitry, 5V tolerant
Real time active low input. When active, SMBus is reset to power up
default.
True clock of differential SRC clock pair.
Complement clock of differential SRC clock pair.
Supply for SRC clocks, 3.3V nominal
Ground pin for the SRC outputs
True clock of differential SRC clock pair.
Complement clock of differential SRC clock pair.
True clock of differential SRC clock pair.
Complement clock of differential SRC clock pair.
True clock of differential SRC clock pair.
Complement clock of differential SRC clock pair.
Ground pin for the SRC outputs
Supply for SRC clocks, 3.3V nominal
True clock of differential SRC clock pair.
Complement clock of differential SRC clock pair.
True clock of differential SRC clock pair.
Complement clock of differential SRC clock pair.
Supply for SRC clocks, 3.3V nominal
Ground pin for the SRC outputs
True clock of differential ATIGCLK clock pair.
Complementary clock of differential ATIGCLK clock pair.
Output enable for PCI Express (SRC) outputs. SMBus selects which
outputs are controlled.
0 = enabled, 1 = tri-stated
1094J—03/16/09
2

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डाउनलोड[ ICS951462 Datasheet.PDF ]


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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
ICS951462Programmable System Clock ChipICS
ICS


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