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ICS950403 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - AMD - K8 System Clock Chip - Integrated Circuit Systems

भाग संख्या ICS950403
समारोह AMD - K8 System Clock Chip
मैन्युफैक्चरर्स Integrated Circuit Systems 
लोगो Integrated Circuit Systems लोगो 
पूर्व दर्शन
1 Page
		
<?=ICS950403?> डेटा पत्रक पीडीएफ

ICS950403 pdf
ICS950403
Advance Information
Pin Descriptions
PIN #
PIN NAME
PIN
TYPE
DESCRIPTION
1 *FS0/REF0
I/O Frequency select latch input pin / 14.318 MHz reference clock.
2 VDDREF
3 X1
4 X2
PWR Ref, XTAL power supply, nominal 3.3V
IN Crystal input,nominally 14.318MHz.
OUT Crystal output, Nominally 14.318MHz
5 GND
6 ~*ModeA/HTTCLK0
PWR Ground pin.
I/O Mode selection latch input pin / Hyper Transport output.
7 ~*ModeB/PCICLK7/HTTCLK I/O Mode selection latch input pin / PCI clock output / Hyper Transport output.
8 ~PCICLK8/HTTCLK2
OUT PCI clock output / Hyper Transport output.
9 VDDPCI
PWR Power supply for PCI clocks, nominal 3.3V
10 GND
PWR Ground pin.
11 ~PCICLK9/HTTCLK3
12 PCICLK10
OUT PCI clock output / Hyper Transport output.
OUT PCI clock output.
13 PCICLK0
14 PCICLK1
15 GND
OUT PCI clock output.
OUT PCI clock output.
PWR Ground pin.
16 VDDPCI
17 ~PCICLK2
PWR Power supply for PCI clocks, nominal 3.3V
OUT PCI clock output.
18 ~PCICLK3
19 VDDPCI
OUT PCI clock output.
PWR Power supply for PCI clocks, nominal 3.3V
20 GND
21 PCICLK4
PWR Ground pin.
OUT PCI clock output.
22 PCICLK5
23 ~PCICLK_F
OUT PCI clock output.
I/O Free running PCI clock not affected by PCI_STOP#.
24 ~PCICLK6
25 SCLK
26 SDATA
OUT
IN
I/O
PCI clock output.
Clock pin of I2C circuitry 5V tolerant
Data pin for I2C circuitry 5V tolerant
27 GND
PWR Ground pin.
28 24_48MHz/Sel24_48#*~
I/O
24/48MHz clock output / Latched select input for 24/48MHz output. 0=48MHz, 1 =
24MHz.
29 AVDD48
30 GND
PWR Power for 24/48MHz outputs and fixed PLL core, nominal 3.3V
PWR Ground pin.
31 48MHz/FS3**
32 PD#*
I/O Frequency select latch input pin / Fixed 48MHz clock output. 3.3V
Asynchronous active low input pin used to power down the device into a low power
IN state. The internal clocks are disabled and the VCO and the crystal are stopped. The
33 GND
latency of the power down will not be greater than 1.8ms.
PWR Ground pin.
34 GND
35 VDDCPU
PWR Ground pin.
PWR Supply for CPU clocks, 3.3V nominal
36 CPUCLK8C1
37 CPUCLK8T1
OUT "Complementary" clocks of differential 3.3V push-pull K8 pair.
OUT "True" clocks of differential 3.3V push-pull K8 pair.
38 VDDCPU
39 GND
PWR Supply for CPU clocks, 3.3V nominal
PWR Ground pin.
40 CPUCLK8C0
41 CPUCLK8T0
OUT "Complementary" clocks of differential 3.3V push-pull K8 pair.
OUT "True" clocks of differential 3.3V push-pull K8 pair.
42 GND
43 VDDA
44 Reset#
45 REF2/FS2*
PWR
PWR
OUT
I/O
Ground pin.
3.3V power for the PLL core.
Real time system reset signal for frequency gear ratio change or watchdog timer
timeout. This signal is active low.
14.318 MHz reference clock / Frequency select latch input pin.
46 VDDREF
47 GND
PWR Ref, XTAL power supply, nominal 3.3V
PWR Ground pin.
48 REF1/FS1*
I/O 14.318 MHz reference clock / Frequency select latch input pin.
* Internal Pull-Up Resistor ** Internal Pull-Down Resistor ~ This Output has 2X Drive Strength
0732—01/27/03
2

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डाउनलोड[ ICS950403 Datasheet.PDF ]


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