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ISL6363 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Multiphase PWM Regulator - Intersil Corporation

भाग संख्या ISL6363
समारोह Multiphase PWM Regulator
मैन्युफैक्चरर्स Intersil Corporation 
लोगो Intersil Corporation लोगो 
पूर्व दर्शन
1 Page
		
<?=ISL6363?> डेटा पत्रक पीडीएफ

ISL6363 pdf
ISL6363
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL6363CRTZ
ISL6363 CRTZ
0 to +70
48 Ld 6x6 TQFN
L48.6x6
ISL6363IRTZ
ISL6363 IRTZ
-40 to +85
48 Ld 6x6 TQFN
L48.6x6
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6363. For more information on MSL please see techbrief TB363.
Pin Configuration
ISL6363
(48 LD TQFN)
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
SCOMP 1
PGOOD 2
VCC 3
ISUMP 4
Temporary Pinout
Subject to Change
36 PHASEG
35 UGATEG
34 BOOTG
33 LGATEG
ISUMN 5
ISEN1 6
ISEN2 7
GND PAD
(BOTTOM)
32 PVCCG
31 VR_HOT#
30 NTCG
ISEN3 8
29 ISUMNG
ISEN4 9
28 ISUMPG
VSEN 10
27 RTNG
PSICOMP 11
26 FBG
RTN 12
25 COMPG
13 14 15 16 17 18 19 20 21 22 23 24
Pin Descriptions
ISL6363
Bottom
Pad
1
2
3
4, 5
6
7
8
SYMBOL
GND
SCOMP
PGOOD
VCC
ISUMP,
ISUMN
ISEN1
ISEN2
ISEN3
DESCRIPTION
Common ground signal of the IC. Unless otherwise stated, signals are referenced to the GND pin. The pad should also be
used as the thermal pad for heat dissipation.
This pin is a placeholder for potential future functionality. This pin can be left floating.
Power-good open-drain output indicating when VR1 is able to supply a regulated voltage. Pull-up externally with a 680
resistor to +5V or 1kto +3.3V.
+5V bias supply pin. Connect a high quality 0.1µF capacitor from this pin to GND and place it as close to the pin as possible.
A small resistor (2.2for example) between the +5V supply and the decoupling capacitor is recommended.
VR1 current sense input pins for current monitoring, droop current and overcurrent detection.
VR1 phase 1 current sense input pin for phase current balancing.
VR1 phase 2 current sense input pin for phase current balancing.
VR1 phase 3 current sense input pin for phase current balancing.
2 FN6898.0
September 29, 2011

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डाउनलोड[ ISL6363 Datasheet.PDF ]


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