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EPE6088S डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Miniature 10 Base-T Interface Module - PCA ELECTRONICS

भाग संख्या EPE6088S
समारोह Miniature 10 Base-T Interface Module
मैन्युफैक्चरर्स PCA ELECTRONICS 
लोगो PCA ELECTRONICS लोगो 
पूर्व दर्शन
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<?=EPE6088S?> डेटा पत्रक पीडीएफ

EPE6088S pdf
ELECTRONICS INC.
Miniature 10 Base-T Interface Module
EPE6088S
The circuit below is a guideline for interconnecting PCA’s EPE6088S with a typical 10 Base-T PHY chip over UTP cable.
Further details of system design, such as chip pin-out, etc. can be obtained from the specific chip manufacturer.
Typical insertion loss of the isolation transformer/filter is 0.7dB. This parameter covers the entire spectrum of the encoded
signals in 10 Base-T protocols. However, the predistortion resistor network introduces some loss which has to be taken
into account in determining how well your design meets the Standard Template requirements. Additionally, the following
need to be considered while selecting resistor values :
a. The filter needs 100termination, thus the Thevenin’s equivalent resistance seen by the filter looking into the transmit
outputs from the chip must be equal to a value close to 100. The typical driver output impedance is 5. Thus
choose R1 and R2 values that are lowered by 5on each leg. Following these guidelines will guarantee that the
return loss specifications are satisfied at all extremes of cable impedance (i.e. 85to 115) while the module is
installed in your system.
b. That the template requirements are satisfied under the worst case Vcc (i.e. 4.5V), will impose a further constraint on
resistor selection, in that they ought to be the minimum derived from the calculations. Add R3 for more flexibility in
setting voltage levels at the outputs.
Note that some systems have auto polarity detection and some do not. If not, be certain to follow the proper polarity.
It is recommended that system designers ground the chip side center taps via a low voltage capacitor. Taking the cable
side center taps to chassis via capacitors, is not recommended, as this will add cost without containing EMI. This may
worsen EMI, specifically if the primary “common mode termination” is pulled to ground as shown.
The pulldown resistors used around the RJ45 connector have been known to suppress unwanted radiation that unused
wires pick up from the immediate environment. Their placement and use are to be considered carefully before a design is
finalized.
It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit
the plane off at least 0.08 inches away from the chip side pins of EPE6088S. There need not be any ground plane beyond
this point.
For best results, PCB designer should design the outgoing traces preferably to be 50, balanced and well coupled to
achieve minimum radiation from these traces.
Typical Application Circuit for UTP with external Resistor Network
TX+
TXd+
TX-
10 Base-T
PHY TXd-
RX+
R1
R2
R1
R2
16
TX+
3
TX-
1
14 6
RJ45*
2 11 1 RX+
RX-
3 92
EPE6088S
4578
67 8
RX-
Chassis
Ground
Notes : * Pin-outs shown are for multiport, DCE configurations : e.g. Hubs, Repeaters
For NIC’s, swap pins 3-6 with pins 1-2.
PCA ELECTRONICS, INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
CSE6088Sb Rev. B 6/2/97
TEL: (818) 892-0761
FAX: (818) 894-5791
http://www.pca.com

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डाउनलोड[ EPE6088S Datasheet.PDF ]


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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
EPE6088SMiniature 10 Base-T Interface ModulePCA ELECTRONICS
PCA ELECTRONICS


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