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IDTCSPT855 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 2.5V PHASE LOCKED LOOP CLOCK DRIVER - Integrated Device Technology

भाग संख्या IDTCSPT855
समारोह 2.5V PHASE LOCKED LOOP CLOCK DRIVER
मैन्युफैक्चरर्स Integrated Device Technology 
लोगो Integrated Device Technology लोगो 
पूर्व दर्शन
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<?=IDTCSPT855?> डेटा पत्रक पीडीएफ

IDTCSPT855 pdf
IDTCSPT855
2.5V PLL CLOCK DRIVER
PIN CONFIGURATION
GND
Y0
Y0
VDDQ
GND
CLK
CLK
VDDQ
AVDD
AGND
VDDQ
Y1
Y1
GND
1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
TSSOP
TOP VIEW
GND
Y3
Y3
VDDQ
PWRDWN
FBIN
FBIN
VDDQ
FBOUT
FBOUT
VDDQ
Y2
Y2
GND
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Max Unit
VDDQ, AVDD
VI(2)
VO(2)
Supply Voltage Range
Input Voltage Range
Output Voltage Range
–0.5 to +3.6
–0.5 to VDDQ + 0.5
–0.5 to VDDQ + 0.5
V
V
V
IIK (VI < 0 or Input Clamp Current
±50 mA
VI < VDDQ)
IOK (VO < 0 or Output Clamp Current
±50 mA
VO > VDDQ)
IO
Continuous Output Current
±50 mA
(VO = 0 to VDDQ)
VDDQ or GND ContinuousCurrent
θJA(3) PackageThermalImpedance
±100 mA
105.8 °C/W
TSTG
StorageTemperatureRange
– 65 to +150
°C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output
clamp-current ratings are observed. This value is limited to 3.6V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
PIN DESCRIPTION
Pin Name
Pin Number
AGND
10
AVDD
9
CLK, CLK
6, 7
FBIN, FBIN
23, 22
FBOUT, FBOUT
19, 20
GND 1, 5, 14, 15, 28
PWRDWN
24
VDDQ 4, 8, 11, 18, 21, 25
Y[0:3] 3, 12, 17, 26
Y[0:3] 2, 13, 16, 27
I/O Description
Ground for 2.5V analog supply
2.5V analog supply
I Differentialclockinput
I Feedbackdifferentialclockinput
O Feedbackdifferentialclockoutput
Ground
I Control input to turn device in the power-down mode
2.5V supply
O Buffered output copies of input clock, CLK
O Buffered output copies of input clock, CLK
2

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