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IDT72P51769 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION - Integrated Device Technology

भाग संख्या IDT72P51769
समारोह 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION
मैन्युफैक्चरर्स Integrated Device Technology 
लोगो Integrated Device Technology लोगो 
पूर्व दर्शन
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IDT72P51769 pdf
IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES
(128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits
COMMERCIAL AND INDUSTRIAL
TEMPERATURERANGES
Table of Contents
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Features ........................................................................................................................................................................................................................ 1
Description ................................................................................................................................................................................................................... 5
Pin configuration ......................................................................................................................................................................................................... 7
Detailed description .................................................................................................................................................................................................... 8
Pin descriptions ......................................................................................................................................................................................................... 10
Pin number table ........................................................................................................................................................................................................ 16
Recommended DC operating conditions ................................................................................................................................................................ 17
Absolute maximum ratings ........................................................................................................................................................................................ 17
DC electrical characteristics ..................................................................................................................................................................................... 18
AC electrical characteristics ...................................................................................................................................................................................... 20
Functional description .............................................................................................................................................................................................. 22
Serial Programming .............................................................................................................................................................................................. 23
Default Programming ............................................................................................................................................................................................ 23
Parallel Programming ........................................................................................................................................................................................... 23
Queue description ..................................................................................................................................................................................................... 25
Configuration of the IDT Multi-queue flow-control device ....................................................................................................................................... 25
Standard mode operation ..................................................................................................................................................................................... 26
Read Queue Selection and Read Operation ......................................................................................................................................................... 27
Switching Queues on the Write Port ...................................................................................................................................................................... 29
Switching Queues on the Read Port ..................................................................................................................................................................... 31
Flag description ......................................................................................................................................................................................................... 42
PAFn Flag Bus Operation .................................................................................................................................................................................... 42
Full Flag Operation ............................................................................................................................................................................................... 42
Empty or Output Ready Flag Operation (EF/OR) .................................................................................................................................................. 42
Almost Full Flag .................................................................................................................................................................................................... 43
Almost Empty Flag ................................................................................................................................................................................................ 43
Packet Ready Flag ............................................................................................................................................................................................... 47
Packet Mode Demarcation bits .............................................................................................................................................................................. 49
JTAG Interface ............................................................................................................................................................................................................ 82
JTAG AC electrical characteristics ............................................................................................................................................................................ 86
Ordering Information ................................................................................................................................................................................................. 87
List of Tables
Table 1 — Device programming mode comparison ........................................................................................................................................................ 22
Table 2 — Setting the queue programming mode during master reset ............................................................................................................................. 22
Table 3 — Mode Configuration ...................................................................................................................................................................................... 25
Table 4 — Write Address Bus, WRADD[7:0] ................................................................................................................................................................... 26
Table 5 — Read Address Bus, RDADD[7:0] .................................................................................................................................................................. 27
Table 6 — Write Queue Switch Operation ...................................................................................................................................................................... 30
Table 7 — Read Queue Switch Operation ..................................................................................................................................................................... 32
Table 8 — Same Queue Switch ..................................................................................................................................................................................... 32
Table 9 — Flag operation boundaries and Timing .......................................................................................................................................................... 45
Table 10 — Packet Mode Valid Byte for x36 bit word configuration ................................................................................................................................. 48
Table 11 — Bus-Matching Set-Up .................................................................................................................................................................................. 52
2 SEPTEMBER 27, 2004

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