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IDT74LVC16374A डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP - Integrated Device Technology

भाग संख्या IDT74LVC16374A
समारोह 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
मैन्युफैक्चरर्स Integrated Device Technology 
लोगो Integrated Device Technology लोगो 
पूर्व दर्शन
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IDT74LVC16374A pdf
IDT74LVC16374A
3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
PIN CONFIGURATION
1OE
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1 48
2 47
3 46
4 45
5 44
6 43
7 42
8 41
9 40
10 39
11 38
12 37
13 36
14 35
15 34
16 33
17 32
18 31
19 30
20 29
21 28
22 27
23 26
24 25
TSSOP
TOP VIEW
1CLK
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2CLK
INDUSTRIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
VTERM Terminal Voltage with Respect to GND –0.5 to +6.5
TSTG Storage Temperature
–65 to +150
IOUT DC Output Current
–50 to +50
IIK Continuous Clamp Current,
IOK VI < 0 or VO < 0
–50
ICC Continuous Current through each
ISS VCC or GND
±100
Unit
V
°C
mA
mA
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
CIN
Input Capacitance
VIN = 0V
4.5
6 pF
COUT
Output Capacitance VOUT = 0V
6.5
8
pF
CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF
NOTE:
1. As applicable to the device type.
PIN DESCRIPTION
Pin Names
Description
xDx
xCLK
Data Inputs
Clock Inputs
xOE 3-State Output Enable Inputs (Active LOW)
x Q x 3-State Outputs
FUNCTION TABLE(EACH FLIP-FLOP)(1)
Inputs
Outputs
xDx xCLK xOE
xQx
XL H
Z
XH
H
Z
L
L
L
HL H
L H L Q(2)
HL
L Q(2)
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
2. Output level before the indicated steady-state input conditions were established.
2

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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
IDT74LVC16374A3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPIntegrated Device Technology
Integrated Device Technology


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