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IDT74LVC16823A डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - CMOS 18-BIT REGISTER - IDT

भाग संख्या IDT74LVC16823A
समारोह CMOS 18-BIT REGISTER
मैन्युफैक्चरर्स IDT 
लोगो IDT लोगो 
पूर्व दर्शन
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IDT74LVC16823A pdf
IDT74LVC16823A
3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS
PIN CONFIGURATION
1CLR
1OE
1Q1
GND
1Q2
1Q3
VCC
1Q4
1Q5
1Q6
GND
1Q7
1Q8
1Q9
2Q1
2Q2
2Q3
GND
2Q4
2Q5
2Q6
VCC
2Q7
2Q8
GND
2Q9
2OE
2CLR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56 1CLK
55 1CLKEN
54 1D1
53 GND
52 1D2
51 1D3
50 VCC
49 1D4
48 1D5
47 1D6
46 GND
45 1D7
44 1D8
43 1D9
42 2D1
41 2D2
40 2D3
39 GND
38 2D4
37 2D5
36 2D6
35 VCC
34 2D7
33 2D8
32 GND
31 2D9
30 2CLKEN
29 2CLK
SSOP/ TSSOP/ TVSOP
TOP VIEW
INDUSTRIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
VTERM Terminal Voltage with Respect to GND –0.5 to +6.5
TSTG Storage Temperature
–65 to +150
IOUT DC Output Current
–50 to +50
IIK Continuous Clamp Current,
IOK VI < 0 or VO < 0
–50
ICC Continuous Current through each
ISS VCC or GND
±100
Unit
V
°C
mA
mA
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
CIN
Input Capacitance
VIN = 0V
4.5
6 pF
COUT
Output Capacitance VOUT = 0V
6.5
8
pF
CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF
NOTE:
1. As applicable to the device type.
PIN DESCRIPTION
Pin Names
xDx
xCLK
xCLKEN
xCLR
xOE
xQx
Description
Data Inputs
Clock Inputs
Clock Enable Inputs (Active LOW)
Asynchronous Clear Inputs (Active LOW)
Output Enable Input (Active LOW)
3-State Outputs
FUNCTION TABLE(1)
Inputs
xOE xCLR xCLKEN xCLK xDx
HXX XX
LLX XX
LH H
XX
HH L L
HH L H
LH L L
LH L H
Outputs
xQx
Z
L
Q(2)
Z
Z
L
H
Function
High Z
Clear
Hold
Load
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
= LOW-to-HIGH transition
2. Output level before indicated steady-state input conditions were established.
2

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