P89LPC9381 डेटा पत्रक PDF( Datasheet डाउनलोड )

डेटा पत्रक - 8-bit microcontroller - NXP

भाग संख्या P89LPC9381
समारोह 8-bit microcontroller
मैन्युफैक्चरर्स NXP 
लोगो NXP लोगो 
पूर्व दर्शन
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<?=P89LPC9381?> डेटा पत्रक पीडीएफ

P89LPC9381 pdf
Philips Semiconductors
8-bit microcontroller with 10-bit ADC
2.2 Additional features
I A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
I Serial flash ICP allows simple production coding with commercial EPROM
programmers. Flash security bits prevent reading of sensitive application programs.
I Serial flash ISP allows coding while the device is mounted in the end application.
I In-Application Programming of the flash code memory. This allows changing the code
in a running application.
I Watchdog timer with separate on-chip oscillator, requiring no external components.
The watchdog prescaler is selectable from eight values.
I Low voltage reset (brownout detect) allows a graceful system shutdown when power
fails. May optionally be configured as an interrupt.
I Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 1 µA (total power-down with voltage comparators disabled).
I Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent spurious
and incomplete resets. A software reset function is also available.
I Configurable on-chip oscillator with frequency range options selected by user
programmed flash configuration bits. Oscillator options support frequencies from
20 kHz to the maximum operating frequency of 18 MHz.
I Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
I Programmable port output configuration options: quasi-bidirectional, open-drain,
push-pull, input-only.
I Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
I LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
I Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
I Only power and ground connections are required to operate the P89LPC9381 when
internal reset option is selected.
I Four interrupt priority levels.
I Eight keypad interrupt inputs, plus two additional external interrupt inputs.
I Schmitt trigger port inputs.
I Second data pointer.
I Emulation support.
Product data sheet
Rev. 01 — 8 September 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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