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EPF8016 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - High Speed LAN Interface Module - ETC

भाग संख्या EPF8016
समारोह High Speed LAN Interface Module
मैन्युफैक्चरर्स ETC 
लोगो ETC लोगो 
पूर्व दर्शन
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<?=EPF8016?> डेटा पत्रक पीडीएफ

EPF8016 pdf
www.DataSheet4U.com
ELECTRONICS INC.
High Speed LAN Interface Module
EPF8016
The circuit below is a guideline for interconnecting PCA’s EPF8016 with a typical 100 BX PHY chip for 100 Mb/s applications
over UTP cable. Further details of system design, such as chip pin-out, etc. should be obtained from the specific chip
manufacturer. The package is a minature SIP, built for convenience of dense board designs for both NIC’s and multiport
applications. Each port requires two such devices.
Typical insertion loss of the isolation transformer is 0.5dB. This parameter covers the entire spectrum of the encoded
signals in 100/155 protocols. Under terminated conditions, to transmit a 2V pk-pk signal across the cable, you must adjust
the specific chip preset template control resistors to get at least 2.12V pk-pk across the transmit side input pins.
It is recommended that system designers do not ground the receiver side center tap, via a capacitor. This may worsen
EMI, specifically if the secondary “common mode termination” is pulled to chassis ground as shown.
Pulling unused pins on the RJ45 to chassis via 50 has been known to suppress unwanted radiation that unused wires
pick up from the immediate environment. Their placement and use are to be considered carefully before a design is
finalized.
The “common mode termination” load of 75 shown from the center taps of the secondary may be taken to chassis ground
via a suitable cap. This depends upon the user’s design, EMI margin, etc.
It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit
the plane off at least 0.05 inches away from pins of EPF8016 the chip side. There need not be any ground plane beyond
this point.
For best results, the PCB designer should design the outgoing traces preferably to be 50 , balanced and well coupled to
achieve minimum radiation from these traces.
Typical Application Circuit for 100 BX over UTP
RX+
RX-
100BX
PHY
TX+
TX-
Vcc
17
6
25
EPF8016
Rcv
75
.01 µƒ
2 kV
17
26
5
EPF8016
75
.01 µƒ
2 kV
1
2
RJ45*
3
6
Notes : * Pin-outs shown are for DCE configurations : e.g. Hubs, Repeaters
PCA ELECTRONICS, INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
CSF8016b Rev. 3 9/30/96
TEL: (818) 892-0761
FAX: (818) 894-5791
http://www.pcainc.com

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डाउनलोड[ EPF8016 Datasheet.PDF ]


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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
EPF8016High Speed LAN Interface ModuleETC
ETC


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