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ICS950902 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Programmable Timing Control Hub - Integrated Circuit Systems

भाग संख्या ICS950902
समारोह Programmable Timing Control Hub
मैन्युफैक्चरर्स Integrated Circuit Systems 
लोगो Integrated Circuit Systems लोगो 
पूर्व दर्शन
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<?=ICS950902?> डेटा पत्रक पीडीएफ

ICS950902 pdf
Integrated
Circuit
Systems, Inc.
ICS950902
General Description
The ICS950902 is a single chip clock solution for desktop designs using the VIA P4X/P4M/KT/KN266/333 style chipsets with
PC133 or DDR memory.
The ICS950902 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part
incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a
serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output
divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each
individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.
Block Diagram
FBOUT
DDRC (5:0)/SDRAM (11,9,7,5,3,1)
DDRC (5:0)/SDRAM (10,8,6,4,2,0)
Power Groups
Pin Number
VDD
GND
55 2
59
16 13
22 19
23 24
34, 40
33, 39
50 47
51 54
0475G—03/23/04
Description
Xtal, Ref
AGP [0:2], CPU digital, CPU PLL
PCI [0:5], PCI_F outputs
48MHz, Fix Digital, Fix Analog
Master clock, CPU Analog
DDR/SDR outputs
2.5V CPUT/C_CS output
3.3V CPUT/C & CPUOD_T/C
2

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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
ICS950901Programmable Timing Control HubIntegrated Circuit Systems
Integrated Circuit Systems
ICS950902Programmable Timing Control HubIntegrated Circuit Systems
Integrated Circuit Systems


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