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LC5852N डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Four-Bit Single-Chip Microcontroller with On-Chip LCD Drivers for Small-Scale Control in Medium-Speed Applications - Sanyo

भाग संख्या LC5852N
समारोह Four-Bit Single-Chip Microcontroller with On-Chip LCD Drivers for Small-Scale Control in Medium-Speed Applications
मैन्युफैक्चरर्स Sanyo 
लोगो Sanyo लोगो 
पूर्व दर्शन
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<?=LC5852N?> डेटा पत्रक पीडीएफ

LC5852N pdf
LC5852N
• Timer functions
— One six-bit programmable timer
— Time base timer (for clock applications)
• Standby functions
— Clock standby function (HALT mode)
The LC5852N provides a halt function that reduces
power dissipation. In halt mode, only the oscillator,
divider and LCD driver circuits operate. All other
internal operations are stopped. This mode allows
the LC5852N to easily implement a low-power
clock function.
— Full standby function (HOLD mode)
— HALT mode is cleared by two external factors and
two internal factors.
• Improved I/O functions
— External interrupt pins
— Input pins that can clear HALT mode (up to 9 pins)
— Input ports with software controllable input resistors:
up to 8 pins
— Input ports with built-in floating prevention circuits:
up to 8 pins
— LCD drivers; common:
4 pins,
segment pins:
25 pins
— General-purpose I/O ports:
8 pins
— General-purpose inputs:
9 pins
— General-purpose outputs (1):
6 pins
(ALM pin, LIGHT pin)
— General-purpose outputs (2):
25 pins
(when all 25 LCD segment ports are used as general-
purpose outputs)
— Pseudo-serial output port:
1 set
(Three pins: output, BUSY, clock)
Function Overview
• Program ROM: 2048 × 15 bits
• On-chip RAM: 128 × 4 bits
• All instructions execute in a single cycle
• HALT mode clear and interrupt functions
(External factors)
Changes in the S and M port input signals
Changes in the INT pin input signal
(Internal factors)
Overflow from the clock divider circuit
Timer underflow
• Subroutines can be nested up to four levels (including
interrupts)
• Powerful hardware to improve processing capabilities
— On-chip segment PLA circuit and segment decoder:
The LCD driver outputs can handle LCD panel
segment display without incurring software
overhead.
— All LCD driver output pins can be switched to be
used as output ports.
— One six-bit programmable timer
— Part of the RAM area can be used as a working area.
— Built-in clock oscillator and 15-stage divider (also
used for LCD alternation signal generation)
• Highly flexible LCD panel drive output pins (25)
Supported
Maximum number Required
drive types
of segments
common pins
1/3 bias—1/4 duty......100 segments ..........4 pins
1/3 bias—1/3 duty......75 segments ............3 pins
1/2 bias—1/4 duty......100 segments ..........4 pins
1/2 bias—1/3 duty......75 segments ............3 pins
1/2 bias—1/2 duty......50 segments ............2 pins
Static ..........................25 segments ............1 pin
— The LCD output pins can be converted to use as
general-purpose output pins.
CMOS type:
25 pins (maximum)
p-channel open drain type: 3 pins (maximum)
• An oscillator appropriate for the system specifications
can be selected.
32 or 65 kHz crystal oscillator, or
400 or 800 kHz ceramic oscillator
Delivery formats
QIP-64A or chip product
No. 4365-2/29

विन्यास 29 पेज
डाउनलोड[ LC5852N Datasheet.PDF ]


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