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IDT74FCT841CT डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - FAST CMOS BUS INTERFACE LATCHES - Integrated Device

भाग संख्या IDT74FCT841CT
समारोह FAST CMOS BUS INTERFACE LATCHES
मैन्युफैक्चरर्स Integrated Device 
लोगो Integrated Device लोगो 
पूर्व दर्शन
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IDT74FCT841CT pdf
IDT54/74FCT841AT/BT/CT/DT
FAST CMOS BUS INTERFACE LATCHES
PIN CONFIGURATIONS
OE
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
GND
1 24
2 23
3 22
4 P24-1 21
5 D24-1 20
6
7
SO24-2
SO24-7
19
18
8
9
SO24-8
&
E24-1
17
16
10 15
11 14
12 13
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
LE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
INDEX
D2
4
5
3
2
1
28 27 26
25
D3 6
24
D4 7
23
NC 8
L28-1
22
D5 9
21
D6 10
20
D7 11
19
1213 14 15 16 17 18
Y2
Y3
Y4
NC
Y5
Y6
Y7
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
2571 drw 02
LCC
TOP VIEW
2571 drw 03
PIN DESCRIPTION
FUNCTION TABLE(1)
Name
DI
I/O Description
I The latch data inputs.
LE I The latch enable input. The latches are
transparent when LE is HIGH. Input data
is latched on the HIGH-to-LOW
transition.
YI O The 3-state latch outputs.
OE I The output enable control. When OE is
LOW, the outputs are enabled. When OE
is HIGH, the outputs VI are in high-
impedance (off) state.
2571 tbl 01
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
VTERM(2) Terminal Voltage
with Respect to
GND
VTERM(3) Terminal Voltage
with Respect to
GND
TA Operating
Temperature
TBIAS Temperature
Under Bias
TSTG Storage
Temperature
PT Power Dissipation
Commercial
–0.5 to +7.0
–0.5 to
VCC +0.5
0 to +70
–55 to +125
–55 to +125
0.5
Military
–0.5 to +7.0
–0.5 to
VCC +0.5
–55 to +125
–65 to +135
–65 to +150
0.5
Unit
V
V
°C
°C
°C
W
IOUT
DC Output
–60 to +120 –60 to +120 mA
Current
NOTES:
2571 lnk 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
Inputs
OE LE
Internal Output
DI QI YI
Function
H H L L Z High Z
H H H H Z High Z
H L X NC Z Latched (High Z)
L H L L L Transparent
L H H H H Transparent
L L X NC NC Latched
NOTE:
2571 tbl 02
1. H = HIGH, L = LOW, X = Don’t Care, NC = No Change, Z = High Impedance
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input
VIN = 0V 6 10 pF
Capacitance
COUT Output
VOUT = 0V 8
12 pF
Capacitance
NOTE:
2571 lnk 04
1. This parameter is measured at characterization but not tested.
6.22 2

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