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IDT7198L डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - CMOS STATIC RAMs 64K (16K x 4-BIT) Added Chip Select and Output Controls - Integrated Device Technology

भाग संख्या IDT7198L
समारोह CMOS STATIC RAMs 64K (16K x 4-BIT) Added Chip Select and Output Controls
मैन्युफैक्चरर्स Integrated Device Technology 
लोगो Integrated Device Technology लोगो 
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<?=IDT7198L?> डेटा पत्रक पीडीएफ

IDT7198L pdf
IDT7198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) Added Chip Select and Output Enable Controls
MILITARY TEMPERATURE RANGE
MEMORY CONTROL
The IDT7198 64K high-speed CMOS static RAM incorpo-
rates two additional memory control features (an extra chip
select and an output enable pin) which offer additional ben-
efits in many system memory applications.
Both chip selects, Chip Select 1 (CS1) and Chip Select 2
(CS2), must be LOW to select the memory. If either chip select
is pulled HIGH, the memory will be deselected and remain in
the standby mode. This dual chip select feature (CS1, CS2)
also brings the convenience of improved system speeds to the
large memory designer by reducing the external logic required
to perform decoding.
PIN DESCRIPTIONS
Name
Description
A0–A13
Address Inputs
CS1 Chip Select 1
CS2 Chip Select 2
WE Write Enable
OE Output Enable
I/O0–I/O3
Data I/O
VCC
Power
GND
Ground
2985 tbl 01
PIN CONFIGURATIONS
A0 1
24
A1 2
23
A2 3
22
A3 4
21
A4 5
A5 6
A6 7
A7 8
A8 9
D24-1
E24-1
20
19
18
17
16
CS 1
OE
GND
10
11
12
15
16
15
VCC
A13
A12
A11
A10
A9
CS 2
I/O3
I/O2
I/O1
I/O0
WE
2985 drw 02
DIP/SOJ/CERPACK
TOP VIEW
INDEX
A1
A2
A3
A4
A5
A6
A7
A8
CS 1
3 2 28 27
1
4 26
5 25
6 24
7 23
8 L28-2 22
9 21
10 20
11 19
12 18
13 14 15 16 17
NC
A13
A12
A11
A10
A9
I/O3
I/O2
I/O1
2985 drw 03
LCC
TOP VIEW
TRUTH TABLE(1)
Mode
CS1 CS2 WE
Standby
HXX
Standby
XHX
Read
LLH
Write
LLL
Read
LLH
NOTE:
1. H = VIH, L = VIL, X = don't care.
OE
X
X
L
X
H
I/O
High-Z
High-Z
DOUT
DIN
High-Z
Power
Standby
Standby
Active
Active
Active
2985 tbl 02
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Mil. Unit
VTERM Terminal Voltage
with Respect to GND
–0.5 to +7.0 V
TA
TBIAS
TSTG
PT
Operating Temperature
Temperature
Under Bias
Storage Temperature
Power Dissipation
–55 to +125
–65 to +135
°C
°C
–65 to +150
1.0
°C
W
IOUT DC Output Current
50 mA
NOTE:
2985 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect reliability.
6.4 2

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