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IDT54FCT273T डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET - Integrated Device Technology

भाग संख्या IDT54FCT273T
समारोह FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET
मैन्युफैक्चरर्स Integrated Device Technology 
लोगो Integrated Device Technology लोगो 
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IDT54FCT273T pdf
IDT54/74FCT273T/AT/CT
FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET
PIN CONFIGURATION
MILITARYANDINDUSTRIALTEMPERATURERANGES
MR
O0
D0
D1
O1
O2
D2
D3
O3
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 O7
18 D7
17 D6
16 O6
15 O5
14 D5
13 D4
12 O4
11 CP
INDEX
32
20 19
D1 4
1 18 D7
O1 5
17 D6
O2 6
16 O6
D2 7
15 O5
D3 8
14 D5
9 10 11 12 13
CERDIP/ SOIC/ SSOP/ QSOP
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max Unit
VTERM(2)
VTERM(3)
TSTG
IOUT
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
–0.5 to +7
–0.5 to VCC+0.5
–65 to +150
–60 to +120
V
V
°C
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 6 10 pF
COUT
Output Capacitance VOUT = 0V
8
12 pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
Dx
MR
CP
Ox
Description
Data Inputs
Master Reset (Active LOW)
Clock Pulse Input (Active Rising Edge)
Data Outputs
FUNCTION TABLE(1)
Operating Mode
Reset (Clear)
Load "1"
Load "0"
Inputs
MR CP
LX
L
H
Dx
X
h
l
Outputs
Ox
L
H
L
NOTE:
1. H = HIGH voltage level steady state
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock
transition
L = LOW voltage level steady state
I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock
transition
X = Don’t Care
= LOW-to-HIGH Clock Transition
2

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डाउनलोड[ IDT54FCT273T Datasheet.PDF ]


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