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EPF8636A डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - PROGRAMMABLE LOGIC DEVICES FAMILY - Altera Corporation

भाग संख्या EPF8636A
समारोह PROGRAMMABLE LOGIC DEVICES FAMILY
मैन्युफैक्चरर्स Altera Corporation 
लोगो Altera Corporation लोगो 
पूर्व दर्शन
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<?=EPF8636A?> डेटा पत्रक पीडीएफ

EPF8636A pdf
FLEX 8000 Programmable Logic Device Family Data Sheet
JTAG BST circuitry
...and More
Features
Yes No Yes Yes No Yes
Peripheral register for fast setup and clock-to-output delay
Fabricated on an advanced SRAM process
Available in a variety of packages with 84 to 304 pins (see Table 2)
Software design support and automatic place-and-route provided by
the Altera® MAX+PLUS® II development system for Windows-based
PCs, as well as Sun SPARCstation, HP 9000 Series 700/800, and IBM
RISC System/6000 workstations
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
Verilog HDL, VHDL, and other interfaces to popular EDA tools from
manufacturers such as Cadence, Exemplar Logic, Mentor Graphics,
OrCAD, Synopsys, Synplicity, and Veribest
Table 2. FLEX 8000 Package Options & I/O Pin Count Note (1)
Device
84- 100- 144- 160- 160- 192- 208- 225- 232- 240- 280- 304-
Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin
PLCC TQFP TQFP PQFP PGA PGA PQFP BGA PGA PQFP PGA RQFP
EPF8282A
EPF8282AV
EPF8452A
EPF8636A
EPF8820A
EPF81188A
EPF81500A
68
68
68
78
78
68 120 120
118 136 136
112 120
152 152 152
148 184 184
181 208 208
Note:
(1) FLEX 8000 device package types include plastic J-lead chip carrier (PLCC), thin quad flat pack (TQFP), plastic quad
flat pack (PQFP), power quad flat pack (RQFP), ball-grid array (BGA), and pin-grid array (PGA) packages.
General
Description
Altera’s Flexible Logic Element MatriX (FLEX®) family combines the
benefits of both erasable programmable logic devices (EPLDs) and field-
programmable gate arrays (FPGAs). The FLEX 8000 device family is ideal
for a variety of applications because it combines the fine-grained
architecture and high register count characteristics of FPGAs with the
high speed and predictable interconnect delays of EPLDs. Logic is
implemented in LEs that include compact 4-input look-up tables (LUTs)
and programmable registers. High performance is provided by a fast,
continuous network of routing resources.
2 Altera Corporation

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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
EPF8636APROGRAMMABLE LOGIC DEVICES FAMILYAltera Corporation
Altera Corporation


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