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HM-6642 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 512 x 8 CMOS PROM - Intersil Corporation

भाग संख्या HM-6642
समारोह 512 x 8 CMOS PROM
मैन्युफैक्चरर्स Intersil Corporation 
लोगो Intersil Corporation लोगो 
पूर्व दर्शन
1 Page
		
<?=HM-6642?> डेटा पत्रक पीडीएफ

HM-6642 pdf
HM-6642
Pinouts
HM-6642 (SBDIP)
TOP VIEW
HM-6642 (CLCC)
TOP VIEW
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
Q0 9
Q1
10
Q2
11
GND
12
24 VCC
23 A8
22 G1
21 G2
20 G3
19 E
18 P
17 Q7
16 Q6
15 Q5
14 Q4
13 Q3
4 3 2 1 28 27 26
A4 5
25 G2
A3 6
24 G3
A2 7
23 E
A1 8
22 P
A0 9
21 NC
NC 10
20 Q7
Q0 11
19 Q6
12 13 14 15 16 17 18
PIN DESCRIPTION
PIN DESCRIPTION
NC No Connect
A0-A8
Address Inputs
E Chip Enable
Q Data Output
VCC
Power (+5V)
G1, G2, G3 Output Enable
P (Note) Program Enable
NOTE: P should be hardwired to GND
except during programming.
Functional Diagram
A8 A
A7
A6
LATCHED
6 GATED
ADDRESS
ROW
A5
A4
REGISTER
A
DECODER
64
A3 6
64 x 64
MATRIX
ALL LINES POSITIVE LOGIC - ACTIVE HIGH
THREE STATE BUFFERS:
A HIGH
OUTPUT ACTIVE
A
A2
A1
A0
LATCHED
ADDRESS
REGISTER
3
A
3
88 8888 8 8
GATED COLUMN
DECODER
D
DATA LATCHES:
L HIGH
Q=D
Q LATCHES ON RISING EDGE OF E
ADDRESS LATCHES AND GATED DECODERS:
LATCH ON FALLING EDGE OF E
GATE ON FALLING EDGE OF E
P SHOULD BE HARDWIRED TO GND EXCEPT
DURING PROGRAMMING
E 8-BIT DATA LATCH
G1
G2
G3
Q0 Q1 Q2 Q3
Q4 Q5 Q6 Q7
6-2

विन्यास 8 पेज
डाउनलोड[ HM-6642 Datasheet.PDF ]


शेयर लिंक


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