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AT24CS256 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 2-Wire Serial EEPROMs - ATMEL Corporation

भाग संख्या AT24CS256
समारोह 2-Wire Serial EEPROMs
मैन्युफैक्चरर्स ATMEL Corporation 
लोगो ATMEL Corporation लोगो 
पूर्व दर्शन
1 Page
		
<?=AT24CS256?> डेटा पत्रक पीडीएफ

AT24CS256 pdf
Absolute Maximum Ratings*
Operating Temperature.................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
Block Diagram
*NOTICE:
Stresses beyond those listed under Absolute
Maximum Ratingsmay cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
A2
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive
edge clock data into each EEPROM device and negative
edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for
serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open
collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A1 and
A0 pins are device address inputs that are hardwired or left
not connected for hardware compatibility with AT24C32/64.
When the pins are hardwired, as many as four 128K/256K
devices may be addressed on a single bus system (device
addressing is discussed in detail under the Device
Addressing section). When the pins are not hardwired, the
default A1 and A0 are zero. The A2 device address input is
a dont careinput.
WRITE PROTECT (WP): The write protect input, when tied
to GND, allows normal write operations. When WP is tied
high to VCC, all write operations to the memory are inhib-
ited. If left unconnected, WP is internally pulled down to
GND. Switching WP to VCC prior to a write operation cre-
ates a software write protect function.
Memory Organization
AT24CS128/256, 128K/256K SERIAL EEPROM: The
128K/256K is internally organized as 256/512 pages of 64-
bytes each. Random word addressing requires a 14/15-bit
data word address.
2 AT24CS128/256

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