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ISL24201 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Programmable Vcom Calibrator - Renesas

भाग संख्या ISL24201
समारोह Programmable Vcom Calibrator
मैन्युफैक्चरर्स Renesas 
लोगो Renesas लोगो 
पूर्व दर्शन
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<?=ISL24201?> डेटा पत्रक पीडीएफ

ISL24201 pdf
ISL24201
Block Diagram
VDD
5
AVDD
2
SDA
SCL
6
7
WP 3
I2C
INTERFACE
DAC
REGISTERS
ANALOG DCP
AND
CURRENT SINK
Q1
CURRENT
SINK
8-BIT EEPROM
ISL24201
4
GND
A1
FIGURE 2. BLOCK DIAGRAM OF THE ISL24201
1
OUT
8
SET
Pin Configuration
ISL24201
(8 LD TDFN)
TOP VIEW
OUT 1
AVDD 2
WP 3
GND 4
PAD
8 SET
7 SCL
6 SDA
5 VDD
(THERMAL PAD CONNECTS TO GND)
Pin Descriptions
PIN
NAME
OUT
AVDD
WP
GND
VDD
SDA
SCL
SET
PAD
PIN
NUMBER
1
2
3
4
5
6
7
8
-
FUNCTION
Adjustable Sink Current Output Pin. The current
sunk into the OUT pin is equal to the DAC setting
times the maximum adjustable sink current
divided by 256. See the “SET” pin function
description below (pin 8) for the maximum
adjustable sink current setting.
High-Voltage Analog Supply. Bypass to GND
with 0.1µF capacitor.
EEPROM Write Protect. Active Low.
0 = Programming disabled;
1 = Programming allowed. This pin has an
internal pull-down current sink
Ground connection.
System power supply input. Bypass to GND
with 0.1µF capacitor.
I2C Serial Data Input and Output
I2C Clock Input
Maximum Sink Current Adjustment Point.
Connect a resistor from SET to GND to set the
maximum adjustable sink current of the OUT
pin. The maximum adjustable sink current is
equal to (AVDD/20) divided by RSET.
Thermal pad should be connected to system
ground plane to optimize thermal performance.
FN7586 Rev 1.00
December 9, 2010
Page 2 of 12

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