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DSC2220 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Low-Jitter I2C/SPI Programmable LVPECL Oscillator - Micrel

भाग संख्या DSC2220
समारोह Low-Jitter I2C/SPI Programmable LVPECL Oscillator
मैन्युफैक्चरर्स Micrel 
लोगो Micrel लोगो 
पूर्व दर्शन
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<?=DSC2220?> डेटा पत्रक पीडीएफ

DSC2220 pdf
DSC2120 DSC2220
Low-Jitter I2C/SPI Programmable LVPECL Oscillator
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin Name
Enable
NC
NC
SCLK
GND
SDA
MOSI
SCL
MISO
CS_bar
SS
Output1+
Output1-
NC
NC
VDD2
VDD
FS
Pin Type
I
NA
NA
I
Power
I
I
O
I
I
O
O
NA
NA
Power
Power
I
Description
Enables outputs when high and disables when low
Leave unconnected or grounded
DSC2120: Leave unconnected or grounded
DSC2220: Serial clock from master
Ground
DSC2120: I2C Serial Data
DSC2220: SPI Serial Data from Master to Slave
DSC2120: I2C Serial Clock
DSC2220: SPI Serial Data from Slave to Master
DSC2120: I2C Chip Select (Active Low)
DSC2220: SPI Slave Select (Active Low)
Positive LVPECL Output
Negative LVPECL Output
Leave unconnected or grounded
Leave unconnected or grounded
Power Supply
Power Supply
Default output clock frequency bit
Operational Description
The DSC2120/2220 is a LVPECL oscillator
consisting of a MEMS resonator and a support
PLL IC. The LVPECL output is generated
through independent 8-bit programmable
dividers from the output of the internal PLL.
DSC2120/2220 allows for easy programming
of the output frequencies using I2C/SPI
interface. Upon power-up, the initial output
frequency is controlled by an internal pre-
programmed memory (OTP). This memory
stores all coefficients required by the PLL for
two different default frequencies. The control
pin (FS) selects the initial frequency. Once
the device is powered up, a new output
frequency can be programmed. Programming
details are provided in the Programming
Guide. Standard default frequencies are
described in the following sections. Discera
supports customer defined versions of the
DSC2120/2220.
When Enable (pin 1) is floated or connected to
VDD, the DSC2120/2220 is in operational
mode. Driving Enable to ground will disable
both output drivers (hi-impedance mode).
Default Output Clock Frequencies
Table 2 lists the standard frequency configurations and the associated ordering information to be
used in conjunction with the ordering code. Customer defined combinations are available.
Table 2. Pre-programmed pin-selectable output frequency combinations
Ordering
Info
Freq Select Bit [FS] Default is [1]
(MHz)
0
1
B0001
fOUT
125
212.5
BXXXX fOUT Contact factory for additional configurations.
Frequency select bit are weakly tied high so if left unconnected the default setting will be [1] and
the device will output the associated frequency highlighted in Bold.
_____________________________________________________________________________________________________________________________ _________________
DSC2120 DSC2220
Page 2
MK-Q-B-P-D-12050103

विन्यास 5 पेज
डाउनलोड[ DSC2220 Datasheet.PDF ]


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