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DSC2211 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Low-Jitter I2C/SPI Programmable Dual CMOS Oscillator - Discera

भाग संख्या DSC2211
समारोह Low-Jitter I2C/SPI Programmable Dual CMOS Oscillator
मैन्युफैक्चरर्स Discera 
लोगो Discera लोगो 
पूर्व दर्शन
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<?=DSC2211?> डेटा पत्रक पीडीएफ

DSC2211 pdf
DSC2111 DSC2211 Low-Jitter I2C/SPI Programmable Dual CMOS Oscillator
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin Name
Enable
NC
NC
SCLK
GND
SDA
MOSI
SCL
MISO
CS_bar
SS
Output1
NC
NC
Output2
VDD2
VDD
FS
Pin
Type
I
NA
NA
I
Power
I
I
O
I
I
O
NA
NA
O
Power
Power
I
Description
Enables outputs when high and disables when low
Leave unconnected or grounded
DSC2111: Leave unconnected or grounded
DSC2211: Serial clock from master
Ground
DSC2111: I2C Serial Data
DSC2211: SPI Serial Data from Master to Slave
DSC2111: I2C Serial Clock
DSC2211: SPI Serial Data from Slave to Master
DSC2111: I2C Chip Select (Active Low)
DSC2211: SPI Slave Select (Active Low)
CMOS output 1
Leave unconnected or grounded
Leave unconnected or grounded
CMOS output 2
Power Supply for CMOS Output 2
Power Supply
Default output clock frequency bit
Operational Description
The DSC2111/2211 is a dual CMOS oscillator
consisting of a MEMS resonator and a support
PLL IC. The outputs are generated through
independent 8-bit programmable dividers from
the output of the internal PLL.
DSC2111/2211 allows for easy programming
of the output frequencies using I2C/SPI
interface. Upon power-up, the initial output
frequencies are controlled by an internal pre-
programmed memory (OTP). This memory
stores all coefficients required by the PLL for
two different default frequency pairs. The
control pin (FS) selects the initial pair. Once
the device is powered up, a new output
frequency pair can be programmed using
I2C/SPI pins. Programming details are
provided in the Programming Guide.
Standard default frequency pairs are
described in the following sections. Discera
supports customer defined versions.
The DSC2111/2211 has independent control
of the output voltage levels of the two
outputs. The high voltage level of Output 1 is
Output Clock Frequencies
equal to the main supply voltage, VDD (pin
13). VDD2 (pin 12) sets the high voltage
level of Output 2. VDD2 must be equal to or
less than VDD. VDD2 can be as low as 1.65V.
When Enable (pin 1) is floated or connected to
VDD, the DSC2111/2211 is in operational
mode. Driving Enable to ground will disable
both output drivers (hi-impedance mode).
The DSC2111/2211 has programmable output
drive strength, which can be controlled via
I2C/SPI. Table 1 displays typical rise / fall
times for the output with a 15pf load
capacitance as a function of these control bits
at VDD=3.3V and room temperature.
Table 1. Rise/Fall times for drive strengths
Output Drive Strength Bits
[OXS2, OXS1, OXS0] - Default [111]
X=1 for output1, and 2 for output2
000 001 010 011 100 101 110 111
tr (ns) 2.1 1.7 1.6 1.4 1.3 1.3 1.2 1.1
tf (ns) 2.5 2.4 2.4 2 1.8 1.6 1.3 1.3
_____________________________________________________________________________________________________________________________ _________________
DSC2111 DSC2211
Page 2
MK-Q-B-P-D-12050102

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डाउनलोड[ DSC2211 Datasheet.PDF ]


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