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IDT8SLVP1102I डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - LVPECL Output Fanout Buffer - IDT

भाग संख्या IDT8SLVP1102I
समारोह LVPECL Output Fanout Buffer
मैन्युफैक्चरर्स IDT 
लोगो IDT लोगो 
पूर्व दर्शन
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IDT8SLVP1102I pdf
IDT8SLVP1102I Datasheet
LOW PHASE NOISE, 1-TO-2, 3.3V, 2.5V LVPECL OUTPUT FANOUT BUFFER
Pin Descriptions and Characteristics
Table 1. Pin Descriptions
Number
Name
Type
Description
1, 16
2, 3, 4,
13, 14, 15
5
6
VEE
nc
VCC
PCLK
Power
Unused
Power
Input
Pulldown
Negative supply pins.
Do not connect.
Power supply pin.
Non-inverting differential LVPECL clock/data input.
7
8
9, 10
11, 12
nPCLK
VREF
Q0, nQ0
Q1, nQ1
Input
Output
Output
Output
Pullup/
Pulldown/
Inverting differential LVPECL clock/data input. VCC/2 default when left
floating.
Bias voltage reference for the PCLK input.
Differential output pair 0. LVPECL interface levels.
Differential output pair 1. LVPECL interface levels.
NOTE: Pulldown and Pullup refers to an internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
CIN
RPULLDOWN
RPULLUP
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
2
51
51
Maximum
Units
pF
k
k
IDT8SLVP1102ANLI MARCH 13, 2018
2 ©2018 Integrated Device Technology, Inc.

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