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8P34S2106 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Dual 1:6 LVDS Output 1.8V Fanout Buffer - IDT

भाग संख्या 8P34S2106
समारोह Dual 1:6 LVDS Output 1.8V Fanout Buffer
मैन्युफैक्चरर्स IDT 
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8P34S2106 pdf
Pin Assignments for 40-VFQFPN Package
Figure 1. Pin Assignments for 40-VFQFPN, 6 x 6 mm Package – Top View
VDDQB
QB2
nQB2
QB3
nQB3
QB4
nQB4
QB5
nQB5
VDDQB
30 29 28 27 26 25 24 23 22 21
31 20
32 19
33 18
34
35
36
8P34S2106
37
38
39
40
17
16
15
14
13
12
11
1 2 3 4 5 6 7 8 9 10
VDDQA
nQA3
QA3
nQA2
QA2
nQA1
QA1
nQA0
QA0
VDDQA
8P34S2106 Datasheet
Pin Descriptions for 40-VFQFPN Package
Table 1. 40-VFQFPN Pin Descriptions[a]
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Name
SELAB
CLKB
nCLKB
VREFB
VDDB
VDDA
VREFA
nCLKA
CLKA
SELAA
VDDQA
QA0
nQA0
QA1
nQA1
Type
Input [PU]
Input [PD]
Input [PD/PU]
Output
Power
Power
Output
Input [PD/PU]
Input [PD]
Input [PU]
Power
Output
Output
Output
Output
Description
Control input. Output amplitude select for channel B.
Non-inverting differential clock/data input for channel B.
Inverting differential clock/data input for channel B.
Bias voltage reference for the CLKB, nCLKB input pairs.
Power supply pin for the core and inputs of channel B.
Power supply pin for the core and inputs of channel A.
Bias voltage reference for the CLKA, nCLKA input pairs.
Inverting differential clock/data input for channel A.
Non-inverting differential clock/data input for channel A.
Control input. Output amplitude select for channel A.
Power supply pin for the channel A outputs QA[0:5]
Differential output pair A0. LVDS interface levels.
Differential output pair A0. LVDS interface levels.
Differential output pair A1. LVDS interface levels.
Differential output pair A1. LVDS interface levels.
©2019 Integrated Device Technology, Inc.
2
January 11, 2019

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