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8P34S2104 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Dual 1:4 LVDS Output 1.8V Fanout Buffer - IDT

भाग संख्या 8P34S2104
समारोह Dual 1:4 LVDS Output 1.8V Fanout Buffer
मैन्युफैक्चरर्स IDT 
लोगो IDT लोगो 
पूर्व दर्शन
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8P34S2104 pdf
Pin Assignments
Figure 1. Pin Assignments for 5mm x 5mm VFQFN Package – Top View
 
21 20 19 18 17 16 15
QB0 22
14 GND
nQB0 23
13 nQA0
QB1 24
nQB1 25
8P34S2104
12 QA0
11 VREFA
QB2 26
10 nCLKA
nQB2 27
9 CLKA
VDDQB 28
8 VDDQA
1234567
8P34S2104 Datasheet
Pin Descriptions
Table 1. Pin Descriptions
Number
Name
Type[a]
1 GND Power
2 QB3 Output
3
nQB3
Output
4
SELA
Input (PU)
5
CLKB
Input (PD)
6 nCLKB Input (PD/PU)
7
VREFB
Output
8
VDDQA
Power
9
CLKA
Input (PD)
10 nCLKA Input (PD/PU)
11 VREFA Output
12 QA0 Output
13 nQA0 Output
14 GND Power
15 VDDQA Power
16 QA1 Output
17 nQA1 Output
Description
Power supply ground.
Differential output B3. LVDS interface levels.
Differential output B3. LVDS interface levels.
Control input. Output amplitude select.
Non-inverting differential clock/data input for channel B.
Inverting differential clock/data input for channel B.
Bias voltage reference for CLKB, nCLKB input pairs.
Power supply pin for the channel A core input and QA[0:3] outputs.
Non-inverting differential clock/data input for channel A.
Inverting differential clock/data input for channel A.
Bias voltage reference for CLKA, nCLKA input pairs.
Differential output pair A0. LVDS interface levels.
Differential output pair A0. LVDS interface levels.
Power supply ground.
Power supply pin for the channel A core input and QA[0:3] outputs.
Differential output pair A1. LVDS interface levels.
Differential output pair A1. LVDS interface levels.
©2018 Integrated Device Technology, Inc.
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September 4, 2018

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