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DSC2010 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Low-Jitter Configurable CMOS Oscillator - Micrel Semiconductor

भाग संख्या DSC2010
समारोह Low-Jitter Configurable CMOS Oscillator
मैन्युफैक्चरर्स Micrel Semiconductor 
लोगो Micrel Semiconductor लोगो 
पूर्व दर्शन
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<?=DSC2010?> डेटा पत्रक पीडीएफ

DSC2010 pdf
DSC2010
Low-Jitter Configurable CMOS Oscillator
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin Name
Enable
NC
NC
GND
FS0
FS1
NC
Output
OS0
OS1
NC
VDD2
VDD
OS2
Pin Type
I
NA
NA
Power
I
I
NA
O
I
I
NA
Power
Power
I
Description
Enables outputs when high and disables when low
Leave unconnected or grounded
Leave unconnected or grounded
Ground
Least significant bit for frequency selection
Most significant bit for frequency selection
Leave unconnected or grounded
CMOS output
Least significant bit for output drive strength selection
Middle bit for output drive strength selection
Leave unconnected or grounded
Power Supply
Power Supply
Most significant bit for output drive strength selection
Operational Description
The DSC2010 is a CMOS oscillator consisting
of a MEMS resonator and a support PLL IC.
The CMOS output is generated through
independent 8-bit programmable dividers from
the output of the internal PLL.
The actual frequency output by the DSC2010
is controlled by an internal pre-programmed
memory (OTP). This memory stores all
coefficients required by the PLL for up to four
different frequencies. Two control pins (FS0
FS1) select the output frequency. Discera
supports customer defined versions of the
DSC2010. Standard frequency options are
described in the following sections.
When Enable (pin 1) is floated or connected to
VDD, the DSC2010 is in operational mode.
Driving Enable to ground will disable the
output driver (hi-impedance mode).
The DSC2010 has programmable output drive
strength. Using three control pins (OS0-OS2)
the drive strength can be adjusted to match
circuit board impedances to reduce power
supply noise, overshoot/undershoot and EMI.
Table 1 displays typical rise / fall times for the
output with a 15pf load capacitance as a
function of these control pins at VDD=3.3V
and room temperature.
Table 1. Rise/Fall times for drive strengths
tr (ns)
tf (ns)
Output Drive Strength Bits
[OS2, OS1, OS0] - Default [111]
000 001 010 011 100 101 110 111
2.1 1.7 1.6 1.4 1.3 1.3 1.2 1.1
2.5 2.4 2.4 2.2 1.8 1.6 1.4 1.4
_____________________________________________________________________________________________________________________________ _________________
DSC2010
Page 2
MK-Q-B-P-D-12042601-2

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डाउनलोड[ DSC2010 Datasheet.PDF ]


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